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Developing a New Generation of Smart Automation with ARM Cortex-M3

發(fā)布日期:2022-10-03 點(diǎn)擊率:97

       
A new generation of 32-bit ARM Cortex-M3 microcontrollers is driving down the power consumption of devices and opening up new opportunities in smart control systems.


The ARM Cortex-M3 processor is a good example of one of the latest generation of processors from core designer ARM to reach volume production for embedded systems. It provides a low-cost platform that meets the needs of embedded designers by using a reduced pin count and low-power consumption with a low latency response to interrupts.

The core uses a 3-stage pipeline with a Harvard architecture that has separate local instruction and data busses, as well as a third bus for peripherals. While this keeps the core small for cost sensitive applications, ARM has added an internal pre-fetch unit that supports speculative branching for higher performance. This combination needs to balance the risks of a cache miss with the latency requirements of an embedded application.

It has been specifically designed to challenge 8-bit and 16-bit controllers in terms of code-efficiency by supporting the ARM Thumb2 compact instruction set, requiring minimal system logic that can often be held entirely on-chip. For microcontroller vendors, the core forms the heart of a family of devices with a wide range of peripherals that are as pin-compatible as possible. These peripherals are targeted at different market segments, from home automation to industrial control, to give the system developer the maximum choice of peripheral, performance and cost, and allowing the devices to be optimized for an application without having to use expensive customization services.

The key to the family is that all the software developed for one part can be used across the family easily, and is upwards compatible with newer devices that are emerging, based around the ARM Cortex-M4. This gives developers a clear and simple upgrade path in the future for the next generation system design. Being a 32-bit core also allows mainstream, high level development tools and mainstream real-time operating systems (RTOS) to be used. Rather than writing an assembler or a dedicated language, automation software developers can use C and the ecosystem of development tools around the Cortex-M3 family. Should the designer wish to move away from this family, it is also possible that the 32-bit code can still be ported to other architectures if necessary, preserving the significant investment in development and testing.

The move to 32-bits brings specific benefits for smart automation. It allows third party networking stacks to be easily integrated into the software base, allowing a range of networking capabilities. These can range from stacks for wireless mesh networks such as Zigbee and mainstream 2.4 GHz Wi-Fi links to TCP/IP stacks to allow every electronic device in the home to be connected to the Internet and controlled via a Web interface. This also impacts on the type of peripherals that are needed. For example, the STM32F20x devices from STMicroelectronics embed 512 bytes of one-time-programmable (OTP) memory that can be used to store critical user data such as Ethernet MAC addresses or cryptographic keys.

The M3 is also a more sophisticated core than a mainstream microcontroller. The STM32F205xx and STM32F207xx devices combine the M3 core with a memory protection unit (MPU), used to separate the processing of tasks from the data protection. This unit manages up to eight protection areas that can all be further divided up into eight sub areas. The protection area sizes are between 32 bytes and the entire 4 gigabytes of addressable memory.

This is particularly helpful for applications where some critical or certified code has to be protected against the misbehavior of other tasks such as the network stacks or authentication. This is vital with home systems to avoid having to reboot devices because of software errors.

The memory protection unit is usually managed by an RTOS with a kernel that can dynamically update the MPU area setting, based on the process to be executed.

STMicroelectronics has also developed a custom unit called an adaptive real-time memory accelerator (ART Accelerator) for the Cortex-M3, providing advantages over traditional Flash memory technologies, which normally require the processor to wait for the Flash memory at higher operating frequencies.

The accelerator uses an instruction pre-fetch queue and branch cache to increase the program execution speed from the 128-bit Flash memory. The CoreMark benchmark shows that the performance achieved by using the ART accelerator is the same as having zero wait state program execution from Flash memory at 120 MHz.

Home automation

Home automation is the heart of the core market for Cortex M3 devices. The range of devices with different peripherals allows the same software to be developed for a wide range of control devices, as well as a central hub or gateway controller.

With clock speeds from 20 MHz to 168 MHz from different vendors, there is a wide range of performance points and the memory and peripheral mix can be tuned to the application, whether it is a controller for smart lighting or a mini-hub controlling a range of different devices. The availability of a wide range of networking stacks for the M3 core helps to speed development and testing. Some vendors such as Atmel have optimized the peripherals for controlling equipment in the home.

Atmel's SAM3N series (Figure 1) operates at a maximum speed of 48 MHz and features up to 256 Kbytes of Flash and up to 24 Kbytes of SRAM. The peripherals include 2 USARTs, 2 UARTs, 2 TWIs, 3 SPI, as well as 1 PWM timer, 6x general-purpose 16-bit timers, an RTC, a 10-bit ADC along with a 10-bit DAC.

DeviceFlashSRAMPackageNumber of PIOsADCTimerPDC ChannelsUSARTDAC
ATSAM3N4A256 Kbytes24 KbytesLQFP48
QFN48
348 channels681-
ATSAM34N4B256 Kbytes24 KbytesLQFP64
QFN64
4710 channels61021
ATSAM3N4C256 Kbytes24 KbytesLQFP100
BGA100
7916 channels61021
ATSAM3N2A128 Kbytes16 KbytesLQFP48
QFN48
348 channels681-
ATSAM3N2B128 Kbytes16 KbytesLQFP64
QFN64
4710 channels61021
ATSAM3N2C128 Kbytes16 KbytesLQFP100
BGA100
7916 channels61021
ATSAM3N1A64 Kbytes8 KbytesLQFP48
QFN48
348 channels681-
ATSAM3N1B64 Kbytes8 KbytesLQFP64
QFN64
4710 channels61021
ATSAM3N1C64 Kbytes8 KbytesLQFP100
BGA100
7916 channels61021


Figure 1: The family also runs Atmel’s QTouch library for capacitive interfaces, offering an easy way to implement buttons, wheels and sliders on equipment.


It operates from 1.62 V to 3.6 V and is available in 48-pin, 64-pin and 100-pin QFP, 48-pin and 64-pin QFN, and 100-pin BGA low cost packages to provide a migration path from the family for cost sensitive applications such as home automation that need a lower bill of materials.

NXP has also been targeting home automation, as might be expected with its heritage from Philips Semiconductors. Its LPC1311/13/42/43 devices operate at higher frequencies of up to 72 MHz with up to 32 Kb of flash memory, up to 8 Kb of data memory, full USB2.0 support on the LPC1342 and 43, an I2C interface, one UART, four general-purpose timers, and up to forty-two general-purpose I/O pins.

With this large number of general-purpose I/O pins, the parts are aimed at smart metering applications, lighting, alarm systems, and controlling white goods.

One of the advantages of this family is the built-in USB PHY support that allows the chip to be booted from a UART or from USB, making system development simpler. It also includes a 20 mA high current output driver on one pin and a 20 mA sink driver on two I2C-bus pins for driving external devices in the 1 Mbit/s Fast-mode Plus mode.

However, the Cortex M3 has not just been the preserve of established semiconductor companies. Norwegian start-up Energy Micro has also used the core to develop microcontrollers with the lowest energy consumption in the market.

The EFM32 ‘Gecko’ devices (Figure 3) combine the Cortex-M3 core with innovative low energy techniques, short wake-up time from energy saving modes and a wide selection of peripherals. They are aimed at battery operated applications as well as other systems requiring high performance and low-energy consumption.

It has developed an Energy Management Unit (EMU) to manage all the low energy modes in the microcontrollers, switching peripherals on and off, as well as switching off the power to unused SRAM blocks.

A Clock Management Unit (CMU) also allows software to manage the clocks on the peripheral blocks on an individual basis, as well as disabling and configuring the available oscillators that can consume significant amounts of power even when not in use.

Energy Micro has also developed a Peripheral Reflex System (PRS), a network that lets the different peripheral modules communicate directly without involving the CPU. The peripheral modules that send out Reflex signals are called producers, and the PRS routes these reflex signals to consumer peripherals that apply actions depending on the data received.

It also differentiates its Gecko microcontrollers with a Low Energy UART that allows two-way UART communication on a strict power budget at speeds of 9600 baud from a single 32.768 kHz clock. Similarly, a Low Energy 16-bit timer (LETIMER) can be used when most of the device is powered down, allowing simple tasks to be performed while the power consumption of the system is kept at an absolute minimum. The LETIMER can be used to output a variety of waveforms with minimal software intervention. It is also connected to the Real Time Counter (RTC), and can be configured to start counting on compare matches from the RTC.

Industrial control

The higher performance of the core also means it can be used in industrial control applications, linking up equipment such as programmable logic controllers and industrial vision. Again the move to 32-bit architecture supports the use of communications stacks for various networks, from industrial protocols such as synchronous Ethernet and Fieldbus to 2.4 GHz wireless Zigbee and Wi-Fi protocols.

The STM32F207xx family from STMicroelectronics runs up to 120 MHz for industrial applications. The wide range of memory densities and peripherals lends itself well to the requirements. These peripherals are connected to two APB buses, two AHB buses, and a 32-bit multi-AHB bus matrix. This allows ST to add new peripherals easily and ensures that the peripherals can communicate without blocking.

All the devices offer three 12-bit ADCs, two DACs, a low-power RTC, twelve general-purpose 16-bit timers including two PWM timers for motor control, two general-purpose 32-bit timers, and a true number random generator (RNG). New peripherals include an SDIO, an enhanced flexible static memory control (FSMC) interface (for devices offered in packages of 100 pins and more), and a camera interface for CMOS sensors that can be used for industrial vision applications.

The STM32F205xx and STM32F207xx family also operates in the –40 to +105°C industrial range from a 1.8 V to 3.6 V power supply. The supply voltage can drop to 1.65 V when the device operates in a reduced temperature range. This means they are targeted at motor drive applications, medical equipment, PLCs and alarm systems, as well as printers, scanners and audio systems.

NXP and ST have both added a Nested Vectored Interrupt Controller (NVIC) into their devices. The STM32F205xxx family NVIC handles up to eighty-seven maskable interrupt channels (not including the sixteen interrupt lines of the Cortex-M3 core) and sixteen priority levels.

This gives low-latency interrupt processing as the interrupt entry vector table address is passed directly to the core for early processing of interrupts and processing of late arriving, higher-priority interrupts, a key requirement for industrial systems that have to respond in hard real time to external events.

Future

One of the advantages of using the Cortex-M3 is a roadmap to higher performance devices. The STM32F405xx and STM32F407xx family is based around the Cortex-M4F, now emerging with operating frequencies up to 168 MHz. It also includes a single precision Floating point unit (FPU) which supports all ARM single precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security, as well as a crypto/hash processor which includes hardware acceleration for AES 128, 192, 256, Triple DES, and HASH (MD5, SHA-1).

Although these are not necessarily pin compatible because of different peripheral sets, all the binary code from the Cortex-M3 devices will run directly on the core, giving a quick way to boost the performance of the next generation equipment designs.

NXP is using the Cortex-M4 core for a new class digital signal controller with performance over 150 MHz. Built on an ultra-low-leakage 90 nm process technology, NXP’s low power design is being aimed at motor control, digital power control, and embedded audio. The company is demonstrating a 7-channel audio graphic equalizer application processing 32-bit precision audio data that requires only 12 MHz of CPU bandwidth using the Cortex-M4 DSP extensions, compared to 60 MIPS without the extensions.

Conclusion

The Cortex-M3 is opening up a wide range of applications in home automation and industrial control with a powerful core and wide range of peripherals. With multiple vendors providing different mixes of peripherals and their own custom blocks, there is a wide choice for the system designer. The advantages of using a standard 32-bit core – from the availability of networking stacks to a mature development ecosystem – translate directly in lower costs, both for the design and for the end equipment.

With the Cortex-M3, core designers can move code between different members of a family and even between devices from different vendors. The upgrade path to the coming Cortex-M4 microprocessor systems allows even more performance with minimal design risk, allowing designers to add more features, not just with clock speed, but with code optimized to the control and signal processing applications at the heart of industrial control and the smart home.

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